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AVATAR-HS SerDes Test
AVATAR-HS SerDes Test
Main Features

High-speed analog front end with CDR

Supports commonly used PRBS patterns

Supports data clock recovery in NRZ/PAM4 format

Supports automatic measurement of eye height and eye width

Support TJ/RJ/DJ measurement and decomposition, support Jitter injection

Support channel embedding

BER test, support PRBS pattern bit error rate statistics

Full-duplex performance test, simultaneous forward and reverse transmission test

Jitter, Vertical and Phase Noise Analysis Software

Demand consultation
AVATAR-HS SerDes Test
AVARTA-HS series, high-speed serial interface tester, is designed for testing various chips with high-speed serial transmission interfaces. In addition to mass production testing, AVARTA-HS is also the preferred measurement machine for R&D debugging and characterization.
  • Configuration
    • Typical Applications
    Serializer Chip/Module
    Deserializer chip/module
    ADAS chips/modules
    In-vehicle high-definition transmission mass production board
  • HSMT/GMSL/FPD-LINK consistency test items
    • Serializer Chip - Serializer

      Deserializer chip - Deserializer

        Serial-Output Rise Time

        Serial-Input Amplitude Margin

        Serial-Output Fall Time

        Serial-Input Jitter Margin

        Total Serial-Output Jitter

        Serial-Input Amplitude Noise Margin

        Deterministic Serial-Output Jitter

        Error Bit Detection

        Random Serial-Output Jitter

        Frequency Offset Margin

        Serial-Output Swing
        SSC Margin
        SSC Mod Rate   Duty Cycle Margin
        SSC Frequency Deviation   Data Rate Margin
        Serial-Output Data Rate and Frequency Offset

        Power spectrum density

  • About the test machine
    • Eye diagram
    • Test architecture
    • Indicator parameters
    • It provides users with powerful and rich measurement and analysis software. In addition to conventional test items such as eye diagrams and BER, the AVARTA-HS machine can also provide some test and analysis capabilities that users are concerned about, such as: jitter injection and jitter decomposition analysis capabilities, support for parameter-configurable CTLE/FFE/DFE error analysis tests, NRZ/PAM4 signal testing through NRZ/PAM4 format data clock recovery, etc. Completely self-developed hardware, software and algorithm IP ensure high-speed test capabilities and provide users with the best test costs.
    • Typical DUTs include:

      Car SerDes chip

      MIPI C-PHY/D-PHY/A-PHY

      Serializer Chip/Module

      Deserializer chip/module

      ADAS chips/modules

      In-vehicle high-definition transmission mass production board

    • MWG-242A/B Series PXIe High-Speed Arbitrary Waveform Generator:

      Bandwidth ················ 10.5GHz

      Resolution ············· 8 bit

      Sampling rate ············· 24 Gsa/s

      Output Channel ·········· A suffix:2.92mm, 2-CH SE./Diff.

                                                                       B suffix:SMP, 2-CH Diff.

      Output amplitude ·········· 100-600 mVp-p
      Storage Depth ·········· 416.7ms @24 GSa/s (10Gpts)

      MDO-401A/B Series PXIe High-Speed Wideband Digital Oscilloscopes:

      Bandwidth ················ 18GHz

      Resolution ············· 8 bit

      Sampling rate ············· 40 Gsa/s

      Input amplitude ·········· 500 mVp-p

      Record length ·········· 500ms @40 GSa/s (20Gpts)
      Input Channels ·········· A suffix:1 CH 2.92mm Diff.
                                B suffix:1 CH SMP Diff.

       
Demand consultation
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