1、AVARTA-HS Series // Introduction

AVARTA-HS series, high-speed serial interface tester, is designed for testing various chips with high-speed serial transmission interfaces. In addition to mass production testing, AVARTA-HS series is also the preferred measurement machine for R&D, debugging and characterization.

  Why is performance testing of high-speed transmission links so important?

  ★ For high-speed serial interfaces, interoperability testing based solely on connection with the Golden Sample cannot characterize the interoperability between the DUT and the actual transceiver in use.

  ★ Harsh usage scenarios require stress testing such as clock deviation on the device under test.

  ★ Generally speaking, high-speed serial transmission applications are expensive. Failure to eliminate defective products at the chip level will result in more serious quality cost consequences.

  ★ Without accurate test results there can be no accurate quality control.

  The main advantages of MET's ARVARTA-HS are:

1.The leading domestic high-speed interface dedicated tester: Avatar-HS tester uses high-speed AWG and broadband DSO for testing (rather than just using transceivers for loopback testing), which can accurately obtain the signal quality and tolerance (Tx Quality & Rx Tolerance) of the device under test. It provides a quality control tool for use in harsh environments such as vehicles.

2.Completely self-developed hardware, software and algorithm IP ensure high-speed testing capabilities and provide users with the best testing costs.

3.Localized service capabilities: close to users and quick response.

4.The Avatar-HS test machine uses domestically produced core chips.

The AVARTA-HS series machines use MET's high-performance transceiver test unit. Depending on the speed level of the device under test, they provide an arbitrary signal generation unit and a real-time oscilloscope unit that support 12.5/20/32/56 GBaud. Combined with a high-precision source measurement unit and a digital pattern unit, they can perform comprehensive measurement, debugging and characterization of the TX, RX and Link of the chip or interface under test.

Based on the hardware framework, MET provides users with powerful and rich measurement and analysis software. In addition to conventional test items such as eye diagram and BER, the AVARTA-HS machine can also provide some test and analysis capabilities that users care about, such as: jitter injection and jitter decomposition analysis capabilities, support for parameter-configurable CTLE/FFE/DFE error analysis tests, NRZ/PAM4 signal testing through NRZ/PAM4 format data clock recovery, etc.

2、AVARTA-HS Series // Application Scenarios

☆ RF Sampling ADC/DAC;

☆ High Speed Clock...

3、AVARTA-HS Series // In-Vehicle SerDes Test

PART/1 Test architecture

PART/2 Indicator parameters

PXIe Arbitrary Waveform Generator Module

• Supports 0.5 - 12.5 GBaud output, 1 Baud symbol rate step
• Support NRZ and PAM4 modulation
• Supports common pseudo-random test patterns such as PRBS 7/9/13/15/23/31 and 13Q/31Q/SSPRQ
• Provides jitter and noise injection capabilities
• Support fixture and channel embedding/de-embedding functions
• Support full-duplex performance testing: simultaneous forward and reverse transmission testing

PXIe Architecting the Real-Time Oscilloscope Module

• 18GHz bandwidth, typical rise time 22ps
• Supports clock data recovery (CDR)
• Eye diagram test: automatically measure eye height, eye width, eye thickness and jitter, and support user-defined eye diagram templates;
• Jitter analysis: Supports decomposition of jitter items such as RJ / PJ / DDJ / DCD
• Equalizer simulation: built-in CTLE / FFE / DFE / Bessel Thomson, etc. in the data path, various common digital equalizers
• Support full-duplex performance testing: simultaneous forward and reverse transmission testing

PART/3 Features & Capabilities

• Supports up to 12.5 GBaud SerDes physical layer testing
  
• PRBS test ............Supports commonly used PRBS patterns
  
• De-embedding capability ............Supports fixture de-embedding
  
• PAM4/NRZ signal ........Supports data clock recovery in PAM4/NRZ format
  
• Eye diagram test ............Supports automatic test of eye height and eye width
  
• Jitter test and analysis.......Support TJ/RJ/DJ measurement and decomposition
  
•              ...Support Jitter injection
  
• CTLE/FFE/DFE...........Support parameter configurable equalization capability test
  
• Support channel embedding
• BER test ............Support PRBS pattern bit error rate statistics
  
• Full-duplex performance test...simultaneous forward and reverse transmission test
  
• Jitter, vertical, phase noise analysis software

PART/4 Eye diagram comparison with lab-grade equipment

                          TX eye diagram test comparison, NRZ, 1G Baud

                            TX eye diagram test comparison, NRZ, 2G Baud

PART/5 TX and RX testing for automotive SerDes

    Automotive SerDes requires RX to be noise-resistant and capable of recovering data from damaged input signals.

  The AVARTA-HS tool can perform SerDes-based protocol verification tests as well as key measurements such as frequency, distortion, jitter and voltage drop, as well as MDI return loss.

• TX return loss test
• TX Timing Jitter
• TX symbol rate accuracy   
• TX equalization capability test
• TX Launch Voltage Test

Automotive SerDes requires RX to be noise-resistant and capable of recovering data from damaged input signals.

The AVARTA-HS can perform stress tests on the RX to verify its ability to work properly in complex vehicle environments, evaluate the receiver, and ensure that digital transmission reaches acceptable quality.

RX bit error rate test
a. Support jitter test
b. Support noise injection
c. Support error injection
d. Support channel embedding
RX equalization capability test
RX jitter tolerance test